A New Digital Architecture For Reliable, Ultra-Low-Power Systems

— We are working towards the speci cation and design of a new system-level architecture serving as the digital control/processing core of ultra-low-power (< 100 μW ) and reliable systems along with a suitable, new compiler. Our primary area of focus is implantable microelectronic devices. While respecting the traditional design constraints of biomedical-implant design for low power consumption and miniature device size, the architecture shall be generic in nature, i.e. allowing for different peripheral blocks (sensors, actuators etc.) to be ported for building various applicationspeci c implantable systems. Also importantly, the proposed architecture shall employ various fault-tolerance techniques for building highly reliable devices. Our approach is bottomup one, starting from the architectural level and being complemented by a suitable, new compiler. The compiler shall provide the means to exploiting this architecture for different application setups and, by design, shall further underpin the reliability and low-power issues. Keywords—Implantable biomedical devices, computer architecture, computer reliability